Distinguished Lecturer de IEEE CPMT (Components, Packaging and Manufacturing Technology) Society

Title: InvitaTSV and Other Key Enabling Technologies for 3D IC/Si Integrations Abstract : 3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration, which will be discussed in this lecture. Emphases are placed on the key enabling technologies for 3D IC integration, such as designs and tests, known good die (KGD), TSV (through silicon via) forming and filling, wafer thinning and handling, thin chip/wafer strength measurement and improving, lead-free microbumping and assembly, low temperature C2C, C2W and W2W bonding, and thermal management. Useful characterization and reliability data for 3D IC integration will also be provided. The application of 3D IC integration such as CMOS image sensor, MEMS, LED, memory + logic, logic + logic, memory + microprocessor, active and passive interposers will be presented. Furthermore, the critical issues of TSV and 3D IC integration will be given and some potential solutions or research topics will be recommended. Finally, TSV manufacturing yield and hidden costs will be discussed and several roadmaps of 3D IC integration will be provided. All the materials are based on the technical papers published within the past 3 years by others and the Lecturer. Who Should Attend? If you (students, engineers, and managers) are involved with any aspect of the electronics, LED, MEMS, and optoelectronic industry, you should attend this course. It is equally suited for R&D professionals and scientists. You will receive more than 300 pages of handouts. Biography: Briel Bio John Lau has been an ITRI Fellow of Industrial Technology Research Institute since January 2010. Prior to that, he was a visiting professor at HKUST for one year, Director of MMC Laboratory with IME for 2 years, and a Senior Scientist/MTS at HP/Agilent in the US for more than 25 years. With more than 30 years of R&D and manufacturing experience, he has authored or co-authored more than 300 peer-reviewed technical publications, more than 20 issued and pending patents, and given more than 250 lectures/workshops/keynotes worldwide. He has authored and co-authored 16 textbooks on advanced packaging, lead-free soldering and manufacturing, reliability of 2D & 3D IC interconnects, and 3D MEMS packaging. John earned his Ph.D. degree in theoretical and applied mechanics (University of Illinois) and three M.S. degrees in structural engineering, engineering physics and management science in North America. He is an elected ASME Fellow and has been an IEEE Fellow since 1994.


Intervenants :
John H. Lau
Industrial Technology Research Institute, Taiwan